Downcnt implements a registered decrementer with a mux that selects
between the decremented value, or the data on the load_data signal. The
borrow-out of the decrementer serves as the term_cnt.
|
Constructor Summary |
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire out)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire out,
long resetState)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire out,
long resetState,
java.lang.String name)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire out,
java.lang.String name)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
BV resetState)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
BV resetState,
java.lang.String name)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
long resetState)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
long resetState,
java.lang.String name)
|
downcnt(Node parent,
Wire clk,
boolean b,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
java.lang.String name)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire out)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire out,
long resetState)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire out,
long resetState,
java.lang.String name)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire out,
java.lang.String name)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
BV resetState)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
BV resetState,
java.lang.String name)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
long resetState)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
long resetState,
java.lang.String name)
|
downcnt(Node parent,
Wire clk_en,
Wire load,
Wire load_data,
Wire term_cnt,
Wire out,
java.lang.String name)
|
|
Method Summary |
boolean |
cellInterfaceDeterminesUniqueNetlistStructure()
When false, the default behavior of this method, each cell will list itself
separately in a netlist, guaranteeing that the netlist will not have invalid
data at the expense of a larger file-size. |
void |
clock()
Clock is used in the behavioral model and is called once per clock cycle |
static byucc.jhdl.contrib.modgen.outputs |
compute(int load,
long load_data,
long out,
int width)
Used in behavioral model to compute the output. |
static byucc.jhdl.contrib.modgen.BVoutputs |
computeBV(int load,
BV load_data,
BV out,
int width)
Used in behavioral model to compute the output. |
void |
connectImplicitPorts()
Connects the implicit ports. |
protected boolean |
defaultSimulationModelIsBehavioral()
Default simulation model is behavioral |
java.lang.String |
getCellName()
Access the cell name associated with a derived class. |
void |
propagate()
Propagate isn't used in this class |
void |
reset()
Resets the output to the user-provided reset state. |
| Methods inherited from class byucc.jhdl.Logic.Logic |
clockDriver, clockDriver, connect_implicit_ports, constructSubCell, constructSubCellNoImplicitPorts, enableNewPlacement, enableNewPlacement, extend, extend, getDefaultClock, getDefaultTechMapper, getGlobalClock, getSinkCell, getSourceCell, getSourceCell, getSourceLeaf, getSourcePlaceable, getSourcePlaceableLeaf, getSubCellClass, getTechMapHint, getTechMapHint, getTechMapper, growAndShiftl, lockChildPlacement, lsb, lsb, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, map, msb, msb, msbIndx, netlist, netlist, netlist, netlist, netlist, netlist, netlist, netlist, padClock_o, padClock_o, padClock_o, padClock, padClock, padClock, padIn_o, padIn_o, padIn_o, padIn, padIn, padIn, padInout_o, padInout_o, padInout_o, padInout, padInout, padInout, padOut_o, padOut_o, padOut_o, padOut, padOut, padOut, padOutT_o, padOutT_o, padOutT_o, padOutT, padOutT, padOutT, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, place, printTechMapHints, range, rotate, rotate, scale, scale, setBBox, setDefaultTechMapper, setFloorPlannerIsMaster, setTechMappingEnabled, setWandH, signExtend_o, signExtend, signExtend, sink, source, takeBot_o, takeBot, takeBot, takeBotSigned_o, takeBotSigned, takeTop_o, takeTop, takeTop, techmap, techMappingEnabled, translate, translate, zeroExtend_o, zeroExtend, zeroExtend, zeroExtendRight_o, zeroExtendRight |
| Methods inherited from class byucc.jhdl.Logic.LogicStatic |
add_o, add_o, and_o, and_o, and, and, buf_o, buf_o, buf, buf, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux, nc, nc, nc, nc, nc, nc, not_o, not_o, not, not, or_o, or_o, or, or, reg_o, reg, vcc_o, vcc_o, vcc, vcc, vcc, vcc, wire, wire, wire, wire, xnor_o, xnor_o, xnor, xor_o, xor |
| Methods inherited from class byucc.jhdl.Logic.LogicGates |
add_o, add_o, add_o, add_o, add_o, add_o, add, add, add, add, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub_o, addsub, addsub, addsub, addsub, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and_o, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, and, ashiftr_o, ashiftr, ashiftr, buf_o, buf_o, buf, buf, checkValueRepresentableInWidth, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat_o, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, concat, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant_o, constant, constant, constant, constant, constant, constant, constant, constant, constant, constant, gnd_o, gnd_o, gnd, gnd, gnd, gnd, mux_o, mux_o, mux_o, mux_o, mux_o, mux_o, mux, mux, mux, mux, mux, mux, name, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, nand_o, |